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PROT_* for PowerPC questions....(revisiting)
From: Joshua Johnson <joshua.johnson(at)charter.net>
Date: Sat Feb 08 2003 - 00:11:40 EST
My question is: Is this really the case? After reading this I consulted the PPC and SPARC arch manuals on my desk and it seems at first glance that the PPC should be able to come quite close to the SPARC, ALPHA, and PARISC. My (quite probably flawed) reasoning follows: The PPC does implement 5 modes of protection on pages for each of 2(?) segment types. The two segment types being user and supervisor. The data as I found it is from the Programming Environments Manual For 32 bit implementations of the PowerPC architecture. http://e-www.motorola.com/brdata/PDFDB/docs/MPCFPE32B.pdf
Chapter 7, Section 3.4 (Memory Protection Facilities) explains the modes
in a table that I will repeat here.
SRWX | | | | X|R|W| SRW | | | | |R|W| SRWX URX | X|R| | X|R|W| SRW UR | |R| | |R|W| SRWX URWX| X|R|W| X|R|W| SRW URW | |R|W| |R|W| SRX URX | X|R| | X|R| | SR UR | |R| | |R| | ======================== S=Supervisor Mode U=User Mode R=Data Read Access W=Write Access X=Instruction Fetch Access So, doesn't this mean that you can take the combinations of RWX from the PROT_* flags and map them as: (PROT)R -> SR UR
Ok, the notable assumptions/exceptions here: I am assuming (naively) that the kernel can/does use supervisor mode. I am assuming that the block translation mechanism is not in place (if it were we lose the X protection <and I go 'Um--Nevermind'>). What is the big key that I am missing here? I do understand that undoubtedly the correct people know all of this stuff already, I am just wondering where I am missing the boat. If someone could be so kind as to point me the general direction of why this won't/doesn't work I would be most appreciative. Thanks again to all for the wonderful OS. Joshua Johnson Received on Fri Feb 7 23:59:26 2003 This archive was generated by hypermail 2.1.8 : Wed Aug 23 2006 - 13:48:30 EDT |
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